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Subject Details
Dept     : CSE
Sem      : 3
Regul    : R2023
Faculty : R.SATHISH KUMAR
phone  : NIL
E-mail  : sathishajay91@gmail.com
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Syllabus

UNIT
1
MINIMIZATION TECHNIQUES AND LOGIC GATES

Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem - Minimization of Boolean expressions - Minterm – Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don’t care conditions. Tabulation method. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive- NOR

UNIT
2
COMBINATIONAL CIRCUITS

Half Adder – Full Adder – Half Subtractor – Full Subtractor –Multiplexer - Demultiplexer – Decoder - Encoder – Parity checker – Parity generators – Code converters: Binary to Gray and Gray to binary- Magnitude Comparator.

UNIT
3
SEQUENTIAL CIRCUITS

Latches, Flip flops:SR, JK, T, D– Characteristic table and equation, Counters: Synchronous counters, up/down counter, Modulo–n counter, Decade counters.

UNIT
4
DESIGN OF SEQUENTIAL CIRCUITS

Register, Shift registers-SISO, SIPO, PISO, PIPO, Classification of sequential circuits: Moore and Mealy, Design of synchronous sequential circuits, State diagram, State table, State minimization, State assignment, Introduction to Hazards: Static, Dynamic.

UNIT
5
MEMORY AND PROGRAMMABLE LOGIC DEVICES

Memories: ROM, PROM, EEPROM, RAM, Programmable Logic Devices: Programmable Logic Array (PLA), Programmable Array Logic (PAL), Implementation of combinational logic using Verilog HDL

Reference Book:

1. Charles H. Roth. “Fundamentals of Logic Design”, 6th Edition, Thomson Learning, 2013. 2. Donald P. Leach and Albert Paul Malvino, “Digital Principles and Applications”, 8th Edition, TMH, 2014. 3. S.Salivahanan and S.Arivazhagan, “Digital Circuits and Design” ,5th edition, Vikas Publishing House Pvt. Ltd, New Delhi,2018.

Text Book:

M. Morris Mano, “Digital Design”, 6th Edition, Prentice Hall of India Pvt. Ltd., 2018 / Pearson Education (Singapore) Pvt. Ltd., New Delhi.