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Dept     : ECE
Sem      : 5
Regul    : 2019
Faculty : m.pradeepa
phone  : NIL
E-mail  : pradeepa.m.ece@snsct.org
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  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>LAYOUT DIAGRAM , </br>Pass transistor Logic & Transmission gates, </br>Power dissipation, </br>Low power design principles, </br>Static CMOS design, </br>Examples of Combinational Logic Design, </br>Domino Logic, </br>Timing issues, </br>Clock strategies, </br>Low power memory circuits, </br>Synchronous design, </br>Asynchronous design, </br>Static and Dynamic Latches and Registers

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>Manufacturing test principles, </br>Design strategies for test, </br>BIST, </br>Chip level test techniques, </br>Basic concepts identifiers , </br>Gate primitives & gate delays, </br>Operators and timing controls , </br>Procedural assignments , </br>Design hierarchies, </br>Behavioral and RTL modeling and Test benches , </br>Examples: decoder, equality detector, comparator

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>MOS transistor theory , IV characteristics,, </br>CV characteristics

  • Question Bank

    Dear Students the Question Bank has been uploaded for the following topics:</br>MOS TRANSISTOR , </br>COMBINATIONAL LOGIC CIRCUITS , </br>SEQUENTIAL LOGIC CIRCUITS

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>Non-ideal IV effects, </br>CMOS inverter –DC characteristics, </br>Layout diagrams, </br>Static CMOS design, </br>Power dissipation, </br>Pseudo NMOS logic, </br>Pipelines, </br>CMOS fabrication- p-well process, </br>Stick diagram, </br>n-well process, </br>Twin-tub process