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Subject Details
Dept     : AIML
Sem      : 5
Regul    : 2019
Faculty : Ms C Parkavi
phone  : 9597661751
E-mail  : parkavi.c.aiml@snsct.org
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Lecture Notes

UNIT 1:
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Functional units
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Basic operational concepts
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Bus Structures
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Memory locations and addresses
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Instruction and Instruction sequencing
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Addressing modes
UNIT 2:
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Addition and subtraction of signed numbers
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Design of fast adders
UNIT 3:
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Hardwired control
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Data hazards – Instruction hazards
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Execution of a complete instruction
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Multiple bus organization
UNIT 4:
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Basic concepts of Semiconductor RAMs - ROMs
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Speed, Size and Cost
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Cache memories
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Virtual memory