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Dept     : AIML
Sem      : 3
Regul    : 2019
Faculty : V.Prabhu
phone  : 9944159722
E-mail  : prabhu.v.cfc@snsgroups.com
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Announcements

  • Assignment

    Assignment topic is How does a memory retain data even when powered off? and due date is 25-11-2024.

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem , </br>Minimization of Boolean expressions - Minterm – Maxterm, </br>Sum of Products (SOP) – Product of Sums (POS) , </br>Karnaugh map Minimization – Don’t care conditions, </br>Tabulation method

  • Puzzles

    Dear Students the Puzzles has been uploaded for the following topics:</br>Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem

  • Lecture Notes

    Dear Students the Lecture Notes has been uploaded for the following topics:</br>Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem , </br>Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem , </br>Half Adder – Full Adder , </br>Flip flops: SR, JK, T, D, </br>Functional Units of a Digital Computer: Von Neumann Architecture , </br>Mapping and Replacement Techniques – Virtual Memory – DMA, </br>Minimization of Boolean expressions - Minterm – Maxterm, </br>Sum of Products (SOP) – Product of Sums (POS) , </br>Karnaugh map Minimization – Don’t care conditions, </br>Tabulation method, </br>Half Subtractor – Full Subtractor , </br>Multiplexer/ Demultiplexer , </br>Decoder /Encoder , </br>Parity checker – Parity generators – Code converters, </br>Register, Shift registers-SISO, SIPO, PISO, PIPO ,Moore and Mealy, </br>Design of synchronous sequential circuits, </br>State diagram, State table, State minimization, State assignment, </br>Counters – 3 bit Synchronous Counter, </br>– Operation and Operands of Computer Hardware Instruction – Instruction Set Architecture (ISA), </br>Memory Location, Address and Operation – Instruction and Instruction Sequencing, </br>Addressing Modes, Encoding of Machine Instruction , </br>Interaction between Assembly and High Level Language, </br>Instruction Execution – Building a Data Path, </br>Designing a Control Unit – Hardwired Control, Microprogrammed Control , </br>Pipelining – Data Hazard – Control Hazards, </br>Memory Concepts and Hierarchy – Memory Management – Cache Memories

  • Resource Link

    Dear Students the Resource Link has been uploaded for the following topics:</br>Minimization Techniques</br>Combinational Circuits</br>Sequential Circuits</br>Computer Fundamentals</br>Processor and Memory</br>Digital Computer Organization</br>DPCO

  • Puzzles

    Dear Students the Puzzles has been uploaded for the following topics:</br>Minimization Techniques, </br>Combinational Circuits, </br>Sequential Circuits, </br>Computer Fundamentals, </br>Processor and Memory

  • Youtube Video

    Dear Students the Youtube Video has been uploaded for the following topics:</br>K Map</br>Comparison between Combinational and Sequential Circuits

  • Assignment

    Assignment topic is Unit 1 and due date is 13-09-2024.

  • Question Bank

    Dear Students the Question Bank has been uploaded for the following topics:</br>Minimization Techniques, </br>Combinational Circuits, </br>Sequential Circuits, </br>Computer Organization, </br>Processor and Memory