MINIMIZATION TECHNIQUES AND LOGIC GATES
Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem - Minimization of Boolean expressions - Minterm – Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don’t care conditions. Tabulation method.
Half Adder – Full Adder – Half Subtractor – Full Subtractor –Multiplexer/ Demultiplexer – Decoder /Encoder – Parity checker – Parity generators – Code converters: Binary to Gray and Gray to binary- Magnitude Comparator.
Flip flops: SR, JK, T, D– Register, Shift registers-SISO, SIPO, PISO, PIPO ,Moore and Mealy, Design of synchronous sequential circuits, State diagram, State table, State minimization, State assignment- Counters – 3 bit synchronous counter
Functional Units of a Digital Computer: Von Neumann Architecture – Operation and Operands of Computer Hardware Instruction – Instruction Set Architecture (ISA): Memory Location, Address and Operation – Instruction and Instruction Sequencing – Addressing Modes, Encoding of Machine Instruction – Interaction between Assembly and High Level Language.
Instruction Execution – Building a Data Path – Designing a Control Unit – Hardwired Control, Microprogrammed Control – Pipelining – Data Hazard – Control Hazards.
Memory Concepts and Hierarchy – Memory Management – Cache Memories: Mapping and Replacement Techniques – Virtual Memory – DMA
Reference Book:
M. Morris Mano, “Digital Logic and Computer Designâ€, Pearson Education, 2016.
Text Book:
1. M. Morris Mano, Michael D. Ciletti, “Digital Design : With an Introduction to the Verilog HDL, VHDL, and System Verilogâ€, Sixth Edition, Pearson Education, 2018.
2. David A. Patterson, John L. Hennessy, “Computer Organization and Design, The Hardware/Software Interfaceâ€, Sixth Edition, Morgan Kaufmann/Elsevier, 2020.
