Lecture Notes || SNS Courseware

Subject Details

Dept : ECE

Sem : 5

Regul : R19

Faculty : Mr.J.Prabakaran

phone : 9551144859

E-mail : prabakaran.j.ece@snsct.org

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Lecture Notes

UNIT 1:

CMOS fabrication- p-well process

n-well process

Twin-tub process

MOS transistor theory , IV characteristics,

Non-ideal IV effects

CV characteristics

CMOS inverter â€“DC characteristics

Stick diagram

Layout diagrams

Layout diagrams

Layout diagrams

CMOS fabrication- p-well process

n-well process

Twin-tub process

MOS transistor theory , IV characteristics,

MOS transistor theory , IV characteristics,

Non-ideal IV effects

CV characteristics

CMOS inverter â€“DC characteristics

Stick diagram

Layout diagrams

UNIT 2:

Examples of Combinational Logic Design

Pass transistor Logic & Transmission gates

Pseudo NMOS logic

Static CMOS design

dynamic CMOS design

Domino Logic

Examples of Combinational Logic Design

Pass transistor Logic & Transmission gates

Pseudo NMOS logic

Static CMOS design

Pseudo NMOS logic

Static CMOS design

dynamic CMOS design

Domino Logic

Power dissipation

Low power design principles

UNIT 3:

Static and Dynamic Latches and Registers

Timing issues

Pipelines

Clock strategies

Low power memory circuits

Synchronous design.

Asynchronous design

UNIT 4:

THEORY VLSI testing

need for testing

manufacturing test principles

design strategies for test

BIST

chip level and system level test techniques

UNIT 5:

THEORY Basic concepts

identifiers

gate primitives

gate delays

operators, timing controls

procedural assignments conditional statements

Design hierarchies, Behavioral and RTL modeling

Test benches&Examples

Announcements

Recent Files

21

Jul

CMOS fabrication- p-well process

21

Jul

n-well process

21

Jul

Twin-tub process

21

Jul

MOS transistor theory , IV characteristics,

21

Jul

Non-ideal IV effects

21

Jul

CV characteristics