Connected successfully Syllabus || SNS Courseware
Subject Details
Dept     : AIML
Sem      : 3
Regul    : 2023
Faculty : Divya M
phone  : 6382809497
E-mail  : ece177
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Syllabus

UNIT
1
MINIMIZATION TECHNIQUES AND LOGIC GATES

THEORY: Minimization Techniques: Boolean postulates and laws – De-Morgan’s Theorem - Minimization of Boolean expressions - Minterm – Maxterm - Sum of Products (SOP) – Product of Sums (POS) – Karnaugh map Minimization – Don’t care conditions. Tabulation method. Logic Gates: AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive- NOR PRACTICAL: Implementation of Logic Gates - AND, OR, NOT, NAND, NOR, Exclusive-OR and Exclusive- NOR

UNIT
2
COMBINATIONAL CIRCUITS

THEORY: Half Adder – Full Adder – Half Subtractor – Full Subtractor –Multiplexer/ Demultiplexer – Decoder /Encoder – Parity checker – Parity generators – Code converters: Binary to Gray and Gray to binary- Magnitude Comparator. PRACTICAL: 1. Design and implementation of Adder and Subtractor using logic gates. 2. Design and implementation of code converters using logic gates 3. Design and implementation of encoder and decoder. 4. Design and implementation of Multiplexer and Demultiplexer

UNIT
3
SEQUENTIAL CIRCUITS

THEORY: Flip flops: SR, JK, T, D– Register, Shift registers-SISO, SIPO, PISO, PIPO ,Moore and Mealy, Design of synchronous sequential circuits, State diagram, State table, State minimization, State assignment- Counters – 3 bit synchronous counter PRACTICAL: Implementation of SISO, SIPO, PISO and PIPO shift registers using Flip- flops.

UNIT
4
COMPUTER FUNDAMENTALS

THEORY: Functional Units of a Digital Computer: Von Neumann Architecture – Operation and Operands of Computer Hardware Instruction – Instruction Set Architecture (ISA): Memory Location, Address and Operation – Instruction and Instruction Sequencing – Addressing Modes, Encoding of Machine Instruction – Interaction between Assembly and High Level Language. PRACTICAL: Simulator based study of Computer Architecture

UNIT
5
PROCESSOR AND MEMORY

THEORY: Instruction Execution – Building a Data Path – Designing a Control Unit – Hardwired Control, Microprogrammed Control – Pipelining – Data Hazard – Control Hazards. Memory Concepts and Hierarchy – Memory Management – Cache Memories: Mapping and Replacement Techniques – Virtual Memory – DMA

Reference Book:

1.Carl Hamacher, Zvonko Vranesic, Safwat Zaky, Naraig Manjikian, “Computer Organization and Embedded Systems”, Sixth Edition, Tata McGraw-Hill, 2012. 2. William Stallings, “Computer Organization and Architecture – Designing for Performance”, Tenth Edition, Pearson Education, 2016. 3. M. Morris Mano, “Digital Logic and Computer Design”, Pearson Education, 2016.

Text Book:

M. Morris Mano, Michael D. Ciletti, “Digital Design : With an Introduction to the Verilog HDL, VHDL, and System Verilog”, Sixth Edition, Pearson Education, 2018. David A. Patterson, John L. Hennessy, “Computer Organization and Design, The Hardware/Software Interface”, Sixth Edition, Morgan Kaufmann/Elsevier, 2020.