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Subject Details
Dept     : AIML
Sem      : 3
Regul    : 2023
Faculty : Divya M
phone  : 6382809497
E-mail  : ece177
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Lecture Notes

UNIT 1:
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Logic gates
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Minimization Techniques: Boolean postulates and laws
pdf
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Minimization of Boolean expressions
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Sum of Products (SOP) – Product of Sums (POS)
pdf
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Karnaugh map Minimization
UNIT 2:
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Half Adder
pdf
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Full Adder
pdf
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Half subtractor
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Full subtractor
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Multiplexer/ Demultiplexer
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Decoder /Encoder
pdf
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Parity checker – Parity generators
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Magnitude Comparator